The only certainty in times of economic uncertainty is change: always difficult and sometimes painful. Many advances in design technology that were "waiting in the wings" for months or years have gained a foothold during times of economic hardship.
Two examples of design technology advances, one in verification and one in silicon implementation, illustrate the way advances are limited to early adopters until economic pressures become extreme.
FPGA-based prototyping of complex systems is a cost-effective way to get a hardware speed verification platform. A complete hardware and design tools package costs about $150k, which is far less than the traditional emulation alternative. You can also replicate the hardware platform cheaply to enable parallel software development, which would be prohibitively expensive with an emulation strategy. Despite the advantages, significant adoption of prototyping for large systems did not happen until the last two years. It didn't happen until the economic pressure to change became extreme.
Structured ASICs are a response to the cost of developing cell-based ASICs. As long as the design effort, risk of the design being incorrect, and nonrecurring engineering costs are modest compared with the manufacturing cost, we prefer to solve our problems with engineering effort and tools. When this isn't true, we switch to a new combination of silicon methodology and matching electronic design automation tools.
There is nothing sacred about the design/manufacturing cost balance offered by cell-based ASICs. Structured ASICs and their associated EDA tools offer a new, more appropriate balance for most designs. Despite structured-ASIC advantages, it took a serious economic downturn to enable the change.
A design methodology that ties all of these implementation choices and options together enables designers to realize the full potential of silicon technology today. Adaptable, user-friendly, high-capacity tools that allow designers to focus on their entire design, and not have to get involved in the physics of ultradeep-submicron devices is critical to achieving desired efficiencies and design results. Also, being able to easily migrate a production design from an FPGA or structured-ASIC implementation into a cell-based design enables companies to invest the high cost of cell-based development on only those devices that are a proven success.
Designers today are adjusting to the new economic climate as they have in the past: by adopting new methodologies and technologies that help them achieve their design objectives at low cost and with minimal risk. New silicon architectures and design technology geared to address these objectives are available to help them meet the current and future challenges.