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Qualifying reticle starts with design








EE Times


The semiconductor industry, constrained by the protracted delay in the introduction of next-generation lithography, has had to extend optical lithography below the 100-nanometer node by adopting increasingly complex reticle-enhancement techniques. Implementation of these RETs, such as optical proximity correction and phase-shift masks, has brought new challenges for lithographers, who are responsible for ensuring that the reticle design is compatible with the established lithography process window. This task is complicated by the fact that the number of RET layers for sub-100-nm designs is increasing dramatically. By the 65-nm node, it's estimated there will be as many as 20 RET layers per mask set, each requiring models calibrated to each reticle/stepper combination.

Currently, design rule check and optical-rule-check software models are used to verify that the design and RETs are done correctly on the reticle design at the physical-design level. These models, however, are only approximations based on optimal focus and exposure conditions and are not designed to simulate the entire process window. They cannot take into account changes in lithography parameters that occur on the production floor (e.g., aberrations in stepper lens, illumination wavelength and quality, and photoresists). These changes can create marginal pattern anomalies-as opposed to design-rule errors or actual defects-that, while not an issue in earlier technology nodes, can dramatically affect yields at 90 nm and below. Today, a defect-free reticle manufactured to specification can nevertheless have RET features that fall outside the process window and cause significant yield losses.

Thus, a new approach that enhances rule checking and reticle inspection is needed to help lithographers identify and correct these marginal design errors upstream-before the reticles hit the production floor. KLA-Tencor is currently investigating a solution that combines wafer inspection, defect analysis and critical-dimension metrology to drive improvements in rule-checking models and, thereby, optimize the reticle design process window. Given that these models are expected to remain in use for the foreseeable future, this effort will be essential to advancing design-for-manufacturing efforts in the sub-100-nm era.

Ingrid Peterson is technical director for the Wafer Inspection Group at KLA-Tencor Corp. (San Jose, Calif.).











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