Though multilevel signaling is new for backplane designers, there's nothing novel about the technology itself. It's been used since the days of the telegraph to increase channel capacity and has been adopted as the signaling scheme to move traffic over telephone wires and for other standards like Gigabit Ethernet.

"Sending more and more levels is the trick that allows you to get more data down the wire without having to wiggle the signal any faster," said Howard Johnson, founder of Signal Consulting Inc. and author of High Speed Signal Propagation: Advanced Black Magic. Johnson was the chief technical editor for the Gigabit Ethernet standard and serves as an adviser to transceiver chip startup Accelerant Networks.

Multilevel signaling transceiver technology has started to trickle into the market from companies like intellectual property provider Rambus and Accelerant, which has licensed its technology to Agere Systems. The strongest case these companies make for multilevel signaling-known in the industry as pulse-amplitude modulation-4 (PAM-4)-is that it allows OEMs to double their board bandwidth using the same connectors and boards as their legacy systems. Johnson is an ardent PAM-4 supporter.

Others say it's too premature to make a case for multilevel signaling. Even if backplanes don't conform to standards, the line cards and switches that hang off them do. And in nearly every case these signaling technologies use conventional nonreturn-to-zero (NRZ) technology, also known as PAM-2. Moreover, with a little help from the board and connector vendors, some say, there's nothing stopping NRZ from meeting 10-Gbit/second signal speeds.

The multilevel-signaling vs. NRZ debate hasn't become a religious war, at least not yet. Accelerant and Rambus say they can interoperate with both multilevel and NRZ signals and see a place for both. "If you're below 4 gig then you really don't need (four-level) PAM. Above 6.4, PAM-2 has a hard time," said Jared Zerbe, director of engineering at Rambus.

This still leaves a gray area for designers to consider multilevel signaling-if they need to at all. Designers must take into account a number of factors, most coming down to the impedance characteristics of their backplanes. Generally, the older the board design, the greater the chance of impedance mismatch as channel speeds go up, which some believe tilts the scales in favor of multilevel-signaling technology.

"If you're trying to go 20 or 24 inches across an FR4 backplane and going at 5 GHz, I think PAM-4 is the right solution," said Johnson. Alternatively, more-advanced board materials and connectors could strengthen the case for staying with chips with faster NRZ transceivers. "There's a lot of debate about where the crossover point is. We just don't see it between here and 10 gig," said Tim Hemken, marketing director for the communications technology division at FPGA vendor Xilinx Inc.

One of the key issues is signal loss, caused by the board material's tendency to absorb a signal's energy, which can rapidly attenuate by the time it reaches the receiver. Standard FR4 board material is the most susceptible to dielectric loss, though it is also among the least costly. Loss can also occur as a result of the skin effect of the traces, though this is considered less of a problem than the dielectric loss of the boards themselves.

To help overcome loss, most makers add equalization, also known as pre-emphasis, to the transmitters on their transceivers. This effectively boosts the signal's amplitude as it begins to traverse the board, so it comes out relatively clean at the receive side. But that won't be enough in the future, most say, since dielectric loss is proportional to frequency.

The other major problem is reflection. Backplanes are particularly vulnerable to reflections because the signals must pass through so many mediums, including chip packages, boards and connectors. The worst offenders, many say, are the vias on the board, especially at the top layers. That's because the vias are usually as long as the board is thick. Indeed, they are so big, Zerbe said, that the excess metal acts as a stub.

For designers hesitant to switch to better boards, connectors and packages, PAM-4 could be the answer, some say. The PAM-4 transceiver divides a signal into four levels, which can be seen as three stacked eye patterns for every cycle. These are encoded as 00, 01, 10 and 11, allowing two bits to be encoded for every symbol time. That essentially doubles the data rate for a given frequency.

If the signal-to-noise ratio for a serial signal is good enough to divide the voltage into four levels, some say, PAM should be considered. Rambus offers this rule of thumb: If the signal at half of frequency (f/2) is greater than three-times the signal at frequency (f), then PAM-4 could be the best option.

That should appeal to designers who want to boost backplane bandwidth immediately, using existing materials and connectors. "If you have older systems you're much more likely to have more amplitude at 2.5 [Gbits/s] than at 5," said Kevin Donnelly, vice president for network communications at Rambus.

At Rambus, Jared Zerbe measures PAM-4 interconnect technology, which promises higher-speed backplane connections without boosting frequency.

That makes multilevel-signaling devices a candidate for system upgrades because they essentially can compensate for reflection and loss problems by increasing data bandwidth without increasing the frequency. In this way, PAM-4 is a good fit for designers looking to upgrade their systems without having to invest in new boards and connectors, an attractive proposal in this economic climate, supporters say.

"One of the target markets for PAM-4 is upgrades," said Bill Hoppin, vice president for marketing and product development at Accelerant. "Three or four years ago 70 percent were new boxes and 30 percent were upgrades. Now it's reversed. Maybe it's 80 percent upgrades and 20 percent are new boxes."

Not so fast, say others. FPGA vendor Xilinx, for one, says calls for the demise of NRZ are premature and points out that just about every fast serial standard today is incompatible with PAM-4 technology.

That's why the company promised to develop NRZ serial transceivers with channel speeds of 10 Gbits/s, slated to appear this year. "PAM is interoperable with nothing; it only talks to itself," Hemken said.

Moreover, not all customers expect to use FR4 exclusively. "There are cost-conscious people who want FR4 everywhere. Some of the bigger guys use FR4 on the line card but use Rogers [board material] for the backplane," Hemken said.

There may be more to it than new materials, however. Connectors, for one, would most likely need to be upgraded to minimize impedance mismatches. Counterboring the vias, which involves drilling out the excess metal, is another technique to overcome reflections; another might be "blind vias" that terminate above the bottom layer.

These are steps that OEMs should not consider unreasonable, according to Xilinx. "If you want to do a 10-gig backplane with FR4 material, the issue is how far do you want to go?" Hemken said. "If you want to go far you'll probably need more-advanced materials. As for the connectors, chances are you're going to need a 10 gig-connector."

Proving that it can be done, Xilinx recently coauthored a paper with Teradyne Connection Systems that described a 10-Gbit/s backplane using a Xilinx transceiver, with equalization on both transmit and receive, and Teradyne connectors. Loss and reflection issues were minimized by using a Rogers 4350 backplane and by counterboring the vias.

But Accelerant's Hoppin calls that approach too expensive for most designers. What's more, no NRZ solution has yet been proposed that can match the performance of PAM-4 transceivers, he said. "We have yet to hear customer feedback that NRZ for 6.25 Gbits/s is even available yet."