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Process tricks tune radios-on-chip








EE Times


For many of those proficient in the black art of RF design, the concept of a single-chip radio stirs up age-old arguments about how processes should be matched to the function for the best performance/cost trade-off. This typically translates to gallium arsenide or silicon germanium for the power amplifier, SiGe or BiCMOS for the mixed-signal section and baseband, and plain-vanilla CMOS for the digital processing side.

Yet with the market heating up for all things wireless, at least half a dozen chip makers are taking up the challenge of single-chip CMOS integration. The task is multifaceted and foreboding. Bill Krenick, manager of Texas Instruments Inc.'s advanced wireless architectures group, called CMOS "a process that a radio was never meant to be developed in.[It's] not easy and requires a broad mix of capability."

Size, cost, power consumption, signal integrity and integration capabilities-especially with the move to multiradio cell phones-are all part of the allure for a successful offering. And for startups with limited access to advanced processes, the only way to elbow into a market dominated by incumbents may well be to leverage advanced design and architectural techniques to realize a radio done in vanilla CMOS.

"IBM wants to see $1 million on the table before they'll even talk with you [about using their SiGe process]," said Ramesh Harjani, chief technical officer and co-founder of Bermai Inc. (Palo Alto, Calif.), an 802.11x wireless-LAN fabless startup with core competencies in 5-GHz 802.11a CMOS integration. Other processes, such as GaAs, don't have the same integration levels as CMOS, said Harjani, so the only alternative is BiCMOS SiGe or regular BiCMOS. "But all are expensive and make it hard . . . to compete with a CMOS-only solution," he said.

At the same time, being fabless creates a certain level of design freedom. "With so much specialization going on, the fabless model is the way of the future," said Rich Redelfs, president and chief executive officer of Atheros Communications Inc., which led the charge into all-CMOS 802.11a WLAN solutions in 2000. "Not having our own investment in a fab also allows us to shop around and get the best, most competitive price and technology at any given moment in time. We don't have to place a $3 billion bet for something three years down the road."

Cambridge Silicon Radio has realized several renditions of its single-chip BlueCore all-CMOS radio. The current version, BlueCore2, is implemented in 0.18-micron CMOS and meets the definition of a single-chip radio, with only an external crystal and some extra memory residing outside the package. With a receiver sensitivity of -85 dBm and an output power of 6 dBm, the radio from this British firm meets or exceeds almost all the main Bluetooth specifications.

TI's BRF6100 displays similar capabilities, with a complete RF front end, digital baseband, memory, power management and ROM-based software on a single, integrated, monolithic IC with power amp. All that resides outside is a metal-can RF front-end filter, a balun and some "rinky-dink" parts that bring the total to 15 components, Krenick said.

Intel Corp.'s PXA800 has been billed as "Internet-on-a-chip," even though the RF and mixed-signal side come from Analog Devices Inc.'s Othello One chip set. Skyworks Solutions Inc.'s SKY74073 Single Package Radio combines a transceiver, power amplifier and associated controller, two surface-acoustic-wave filters and a switchplexer module that includes switches and low-pass filters-all in a 40-pin, 13 x 13-mm laminate multichip module.

Philips Semiconductors has taken a more integrated, BiCMOS approach for its recently announced UAA3537 transceiver for GSM, GPRS and Edge. The device integrates on one die the complete RF and mixed-signal chain, minus some external passive components.

For wireless LANs, the undisputed all-CMOS solution provider is Atheros, and that company is now readying a two-chip solution with internal power amps for both 5- and 2.45-GHz operation. Bermai is prepping a single-package, all-CMOS 5-GHz radio comprising two dice plus support components. It too has on-board power amps and requires boosters for the upper two U-NII bands.

For Bermai, Atheros and now TI, the key to success lies in, among other things, noise management through finely tuned DSP algorithms that offset the limitations of CMOS.

"The key is to do it without adding cost to the process through the addition of reticles," said TI's Krenick. TI will rely on an advanced direct-conversion architecture that will use the company's 90-nanometer process to apply digital processing techniques to mitigate the limitations of CMOS. "What you want to do is use an architecture that takes advantage of the integration technology," said Krenick.

That involves a lot of sampled-data analog capability, he said. "It's similar to the switched-capacitor filter technology of the '80s, but out at the radio frequency." TI's single-chip monolithic cell phone will appear in 2004 in a 90-nm process with an external power amp and less than 25 total external passives, Krenick said.











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