Now dubbed Arapahoe, Intel's former 3GIO will be released in draft form for several key developers around the time of the fall Intel Developer Forum, with a public release slated for later in the year. Upon completion of the Arapahoe 1.0 spec, it will be transferred to the PCI SIG, which will own the spec and assume responsibility for the promotion and further development of the interconnect architecture.

Just as PCI replaced ISA, the PCI SIG will be working hard to make Arapahoe transparent to PCI and PCI-X, said Roger Tipley, a Compaq executive who also works as president and chairman of the board at the PCI SIG. An open industry specification, Arapahoe will be a point-to-point, full-serial interface that can be scaled beyond 10 GHz, or to the theoretical limits of copper.

"The key message is that PCI software and device drivers do not have to change to be supported in the base level of Arapahoe," Tipley said. "As far as the actual link level, how electrons get across the wires, that's quite different, and obviously won't be the same PCI pins. It will be very similar to what a link would look like for 10 Gigabit Ethernet or InfiniBand, that kind of signaling."

Tipley said that the SIG will have a lot of work to do to make sure that Arapahoe is "electrically, physically something our members want." Though the debut of a silicon implementation of Arapahoe will be a few years off, "PCI-X hits all of the performance needs of everything I can think of in the next five years, I/O-wise," Tipley said. While mum on the actual voting statistics, Tipley said that a two-thirds vote is needed for anything contentious, and called the voting "very supportive, an overwhelming approval."

Advanced Micro Devices (AMD), whose HyperTransport interconnect architecture is often viewed as a rival scheme, surprisingly voted in favor of the endorsement, said Gabrielle Satori, head of the recently announced HyperTransport consortium. "We voted yes. HyperTransport is actually complementary to this," Satori said. "There are similarities between the two, but one thing we can't forget is that we have 12.8 Gbytes/second now, and two years from now we'll have much more than that."

HyperTransport, based on a low-voltage differential signaling (LVDS) that can scale up to 32 bits in either direction, will support Arapahoe when the need becomes apparent, Satori said. "We are now building one HyperTransport link to multiple PCI-X links, and if (Arapahoe) is really necessary for users, and the market really needs Arapahoe, we'd just evolve the [HyperTransport] spec and go into it. We are simply doing as we did for all the other I/O technologies."

Intel maintains that, though Arapahoe is revolutionary in nature, care will be taken to make it as evolutionary as possible. "We've gone from the first to the second generation already, and the compatibility that we maintained there will be going to the third generation. The level of compatibility that we are anchored on is the configuration and device driver model. PCI software compatibility will give us that migration path," said Bala Cadambi, program manager for third-generation interconnect technology at Intel (Santa Clara, Calif.).

Spreading serial interconnect technologies across a wide range of platforms would benefit more than just desktop PCs, Intel said. "Our intention is to get a lot of folks across multiple segments involved," said Michelle Leyden Li, a platform initiative manager within Intel's Desktop Platform Group. "Not only desktops, but in mobile and workstation environments, and servers and communications as well."

A chip-to-chip, inside-the-box interconnect, Arapahoe will work in tandem with InfiniBand, which will be used more for clustering outside the box, in multi-server environments like data centers. "The desktop market will drive the pricing of components necessary to implement this technology," said Matthew Theall, director of third-generation I/O programs within Intel's Communications Group. "The desktop will be one of the first adopters of the third-generation I/O, and we think those volumes will make it attractive to other areas as well."

PCI SIG's Tipley believes that PCI-X will serve the industry's performance needs for the next five years, while the Arapahoe spec continues to be fine-tuned. "My expectation is that by late 2003, there will probably be some early devices you can start playing with, and my personal expectation is that the real ramping up of systems won't happen until 2004."

Tipley said that version 3.0 of the PCI spec will be ready next year. "It takes all the PCI specs today, updates them and puts them all in the same volume," Tipley said. "We're expecting Arapahoe to be one of those volumes of that spec, as well as PCI-X, PCI-X double data rate and PCI-X quad data rate."