In the acquisition announced Monday (July 10), Xilinx gains seven engineers and Forge—a Java- or C++-to-Verilog synthesis technology that Xilinx plans to incorporate into its next generation FPGA synthesis software.

Xilinx will integrate Forge with synthesis technology Xilinx purchased from MINC Inc. last year, said Richard Sevcik, Sr. vice president of software at Xilinx.

"We believe that synthesis technology is key to getting high clock frequencies out of our devices," said Sevcik. "We know that Java and C++ are going to become more and more important to engineering productivity and improving time to market, so by acquiring the LavaLogic technology and people we will be delivering a Java and C++ capability, hopefully be October."

He said the current version of Forge, which is still in beta and has not been released industry wide, has been used by both ASIC and FPGA designers.

The current version of the tool compiles JAVA, C or C++ to Verilog but that Xilinx and the LavaLogic team plan on integrating the tool in such a way that it will translate Java or C++ directly into a Xilinx FPGA, Sevcik said. This allows hardware engineers to design at a higher level of abstraction but it also allows software engineers who have some hardware knowledge to bypass hardware engineers and program FPGA directly.

"It can be used by software engineers who are very familiar with Java or by hardware engineers who want to move up a level of abstraction," said Sevcik. "Instead of writing Java that runs on a processor, a software engineer for a very high speed application will be able to write Java and be able to compile it directly into a Virtex 10-million gate part."

Sevcik predicts that FPGA business will become a lot like the DSP world in which design is evenly split between hardware and software designers.

In the DSP market today about half the designs are done by hardware engineers who are targeting ASICs and the other half is done by software engineers targeting DSP processors, Sevcik said.

"The same will happen to FPGA world. Today about 99 percent are done by hardware engineers, but as we go into the future we think hardware engineers will still do the majority of the FPGA designs, but we need to have a tool that will allow software engineers to do it too. Just like in the DSP market it opens it up so that twice as many engineers can use our Virtex technology," he added.

Sevcik said that the purpose of developing the technology is not to eliminate hardware engineers.

"Hardware engineers are getting interested in high level languages too because of the productivity improvement so this will allow hardware engineers to move into these areas faster," he said.

Don Davis, director of engineering at LavaLogic, said the business unit is very happy to be joining Xilinx and that doing so will allow the unit to further develop Forge.

Davis said the group, which originally developed the technology with money from its parent company and from DARPA, was like many EDA startups having trouble gaining venture backing to take the next step up, do a formal launch and build a sales force. "Most of the VCs seem more interested in dot-coms and Internet startups," he said.

He said in being purchased by Xilinx, the group will be in a better position to focus its efforts on improving the synthesis tool's performance because the group will know and have full access to all the tools in the Xilinx flow. "We will be able to focus our efforts solely on Xilinx tools and architectures," said Davis. "This should speed tool development."

Many FPGA designers are still using schematic entry tools and are just now adopting HDL-based tools, begging the question: why would a company develop a tool with an even higher level of abstraction?

"The idea is to have the next-generation tools available to designers before they are ready to take the step to the next level," Davis said.

FPGA designers were highly interested in the technology and that about half of all the people who downloaded the beta version of the tool from LavaLogic's web site were FPGA designers, he added.

"I'm not sure if they are the schematic guys or the ones using HDLs, but we do know is that FPGA designers are interested in this technology."

Gary Smith, chief analyst at Dataquest, is skeptical about the tool being used adequately by software engineers.

"There is this belief, among hardware types, that a great way to solve the shortage of hardware designers is to let the software developers do all the design," Smith said. "In the late 1980s, when we first started giving classes in VHDL we made an interesting discovery. If the student was a software developer (and at first, most of them were) they wrote beautiful code but their hardware never worked. Hardware designers wrote ugly code that worked."

Smith also noted that there is a greater shortage of good software developers than there are good hardware designers.

Davis believes that the tool will initially make its biggest impact with hardware designers but that after some work, software designers familiar with hardware design should be able to use it. "If you put junk Java into it, chances are junk will come out of it," said Davis. It is the same with hardware design, if you put bad HDL into a design it won't make a good device."