LOS ANGELES—Accellera, the EDA organization formed by the merger of Open Verilog International (OVI) and VHDL International (VI), wants to standardize a C/C++ language for high-level design. But it is not yet clear which, if any, of the three competing C language technologies—from the Open SystemC Initiative, C Level Design Inc or from CynApps Inc.—will be motivated to join in.
Accellera has decided to create a task force to define an example C++ class library for use in design, verification and implementation of electronic systems and has called for technical contributions from interested parties.
The task force is a sub-committee of the Architectural Language Committee (ALC), and the C++ class library will serve as an example implementation within its Semantic Reference Manual (SRM).
"The concept of C/C++ based design methodologies is starting to gain acceptance among leading systems companies," said Dennis Brophy, co-chair of the Accellera Unification Committee. "The need for an open and inclusive standard in this area has been growing for some time. We are going to capitalize on contributions from the industry to jumpstart this activity," added Brophy.
However, it is not clear whether Open SystemC Initiative, backed by Synopsys and powerful systems and semiconductor companies, which has already made an open source C/C++ library available to designers will be prepared to cooperate. Synopsys executives have frequently expressed disdain for standards set by committee saying the only useful standards are those created by common use.
Nonetheless the Accellera ALC group is setting up an open meeting for Tuesday June 27 to review initial technology contributions. The group said it believes that no single vendor has all the technology necessary to support next generation system design and by working together, they can develop this next generation at an unprecedented pace.
