LavaLogic, a business unit of TSI TelSys, is also gearing up to spin out as a separate company, said Richard Bosenko, LavaLogic's president. He said the unit is currently looking for venture funding, and is prepared to spin out as soon as the funding is received.

Forge accepts Java byte code, which can come directly from a Java program or from MetaWare's C/C++ compiler. It builds control data-flow graphs, performs various compiler optimizations and provides the basic steps of behavioral synthesis: resource allocation, resource sharing and scheduling. Forge's output is synthesizable, register- transfer-level Verilog.

LavaLogic has been arguing that Java is a superior system-level design language, given its memory model, lack of pointers and built-in thread constructs. But the company decided that an "open-system front end" was better than a Java-only design system.

No conversion plans

"Java has some advantages when it comes to efficient implementation of hardware," said Bosenko. "But it's never been our intent to try to convert the world to Java. Being platform- and language-independent has really been our goal."

In addition to Java, Forge can accept input based on the CynLib C++ class library proposed by CynApps, or the SystemC class library backed by Synopsys and CoWare.

Forge has been shipping to beta sites since last year, and is going into production release in June. Bosenko acknowledged that no silicon has yet taped out using Forge, and that the product has not yet generated any revenue.

However, there have apparently been some impressive test cases, most notably one that was run on a PicoJava floating-point unit in cooperation with Sun Microsystems Inc. Bosenko said LavaLogic took a design that had taken nine man-months to manually translate from C to RTL Verilog and made the translation in less than one man-month using Java and Forge.

In this test case, there were fewer than 3,500 lines of Java code, compared with more than 20,000 lines of Verilog code; functional verification took 3 minutes for Java vs. 33 hours for cycle-accurate Verilog; and, perhaps most impressively, the synthesized net-list used 11 percent less area and had comparable performance to the original implementation.

LavaLogic is calling Forge an "architectural synthesis" tool, which Bosenko described as "everything behavioral synthesis does, and more." He said Forge uses a compilation approach, instead of the "progressive elaboration" that most rivals use. Compilation makes it possible to work at a higher level of abstraction without relying on class libraries, LavaLogic argues.

Forge accepts user constraints provided in an ASCII file, including area, latency, gate depth and effort. It takes the Java byte code, unravels stacks and builds control data-flow graphs. These are basically directed node graphs, where the nodes are Java byte codes and the edges contain data and control dependencies.

Forge runs a data-dependency analysis, performs optimizations such as loop unrolling and determines whether the design will be pipelined for high performance or microsequenced for a minimal hardware implementation.

Resource allocation, resource sharing and scheduling are "guided" processes, said Don Davis, LavaLogic's director of engineering. If designers want resource sharing, they must tell Forge in script files.

Guidance needed

"The tool does automatic scheduling, but it does it according to default constraints and preferences. If you want it a different way, you need to tell it," said Davis, acknowledging that user guidance will be needed for real-world designs.

After scheduling, Forge produces what Davis called "human-readable, well-commented Verilog. It's not necessarily tight code, but it synthesizes to really tight hardware." VHDL output will be added in a later release.

The compilation process, said Davis, took "on the order of minutes" for the PicoJava FPU implementation, which synthesized to 40,000 gates.

Forge does not currently have a simulation environment. That's planned for a third-quarter release. The product initially runs on Unix platforms, with Linux and Windows NT support planned for later in the year.

Forge lists for $100,000.