The "notched-poly" process refinement described by Tahir Ghani, senior engineer with Intel's logic technology development group (Portland, Ore.), has already been included in Intel's 0.18-micron CMOS process and in circuits manufactured with transistor gate lengths of 0.1 micron (100 nanometers). At a session after his presentation, Ghani said Intel had "made Pentium III devices but not shipped them yet." He later qualified that statement, saying, "Some devices have shipped, but we haven't announced that yet." Regardless, "The clock frequency is better than 800 MHz," Ghani said.

The development strayed from the norm at IEDM, where technology described in presentations normally shows up in circuit implementations at the International Solid-State Circuits Conference (ISSCC) the following year or sometimes two or more years later.

Notched-poly process

Intel's 0.18-micron process technology normally produces transistors with a 0.13-micron gate length, but in his presentation Ghani said a method had been devised that allowed a notch to be introduced at the bottom of each transistor's polysilicon gate, thereby narrowing the gate length to 100 nm.

Another advantage of the notched-poly process is that it allows the continued use of 248-nm lithography, Ghani said.

The shorter gate length, together with other refinements described in the paper, reduces the gate capacitance and allows circuits to be built with higher-speed performance at a reduced operating voltage (1.2 to 1.5 V) and with higher current drive and low leakage current.

"The drive current is increased by about 10 percent," said Ghani.

He would not offer specifics on Intel's method for making the gate-shortening notches, but he did say that it's "cost-free" (implying that it requires no extra process steps) and that the lateral and vertical dimensions of the notch are highly controllable — an important factor in repeatability and reliability.

Ghani added that Intel uses a 16-Mbit SRAM design as a test vehicle for its 0.18-micron process node and that such an SRAM, operating at a 1.16-GHz clock frequency, has been built using the notched-poly process. More details on that circuit are due to be revealed in February.

Other features of the notched-poly refinement are an optimization of the source and drain doping implantation and annealing and a change from a titanium to a cobalt salicidation process, but Ghani stressed that no change was required to Intel's standard gate oxide or its 2-nm thickness.

Noting that reliability of the gate oxide is a major concern with leading-edge processes, Ghani said tests indicated the new configuration would exhibit a lifetime in excess of 10 years at 1.5-V operation.

"The variations are similar to what we see for straight poly," he said. "The oxide is extremely robust."