While both OVI and the SLDL group have vowed to cooperate, they have shown little coordination so far, and it remains to be seen how the proposals will mesh. The groups are taking different approaches, with OVI focusing more on hardware design and SLDL taking a broader, system-level scope.

Those standardization efforts are crucial because they will define the meaning of the system-level or "architectural" languages that will become essential for system-on-chip design. Both OVI and the SLDL group have decided it's better to focus on semantic questions — such as how components interact, what hierarchy is, or how tasks and processes behave — than to try to select a specific syntax, such as C/C++, Java or Superlog.

For OVI's architectural language committee, the recent decision to come up with a "Semantic Reference Manual" is a dramatic switch from the earlier goal of endorsing a specific language proposal. The SLDL group, on the other hand, long ago decided that a monolithic design language won't work and instead is developing Rosetta, a formal constraint language that can sit on top of multiple functional languages.

"Our hope is to eliminate the Tower of Babel you'd otherwise get from a number of implementations that have similar but distinct semantic meanings," said OVI chairman Dennis Brophy. "You should be able to pick C++, Java or Superlog, use similar notations and be able to reuse tools."

Steve Schulz, executive sponsor of the SLDL initiative, said SLDL has formed a "system semantics working group" and tapped several noted academics to help develop an "abstract syntax" for system-level design. "It's a kind of foundation by which you can talk about different semantics," he said. "It has to be formal, clean and unambiguous."

Until very recently, both OVI and SLDL were apparently unaware of each other's efforts. The first presentations of their work came at a November meeting of the Virtual Socket Interface Alliance's system-level design group. But informal conversations have led both groups to view the efforts as more complementary than competitive.

"I think we may find a possibility of avoiding conflict and overlap to a large extent," said Schulz, adding that the work of OVI's architectural language committee (ALC) "appears to be more in support of cycle-based simulation and hardware modeling, as opposed to real co-design semantics."

"[SLDL's] scope continues to be broader than ours," said OVI's Brophy. "The ALC work is much more focused on the hardware side of the equation and is firmly rooted to enhance the productivity of the Verilog HDL user as a first step."

The OVI semantic effort has actually been brewing for some time, said ALC chairman Vassilios Gerousis. A "requirement semantic document" was started in September and completed in October, he said. More recently, an ALC subcommittee started to draft a semantic reference manual (SRM).

Gerousis said the first draft will be done by January, with full standardization by June. ALC will also develop an API to access and manipulate all objects in the language semantic. Implementations will be provided in C/C++, Java and Superlog.

"The basic premise is that, rather than choose a winner — or even worse, create a new tongue — we standardize on a specific meaning that everyone can target," said Oz Levia, chair of the SRM definition subcommittee. "The semantic concepts we're looking at are those that make it possible to describe a system. There will be a definition of what a task looks like, what a process looks like, how parallelism is described, what a control interface is, how data communications happen."

Brophy said the SRM will also define levels of abstraction, describe how hierarchy is expressed, talk about data objects and data types, scheduling mechanisms and protocol abstractions. It will not get into testbenches, he said, and its level of abstraction will stop at cycle-accurate modeling for simulation.

OVI's new commitment to standardize on semantics, rather than pick a language, is drawing good reviews. "By defining a semantic model first, they'll clarify what the objectives and goals of system-level languages are," said Grant Martin, senior architect at Cadence Design Systems' system-level architectural group. "Then, potentially several different languages and notations may conform with that semantic model. This is something we at Cadence have felt is appropriate for a long time now."

Synopsys Inc., which is pushing its SystemC C++ class library as a new industry standard, is warming to the new OVI effort. "This is a promising development that provides a much-needed semantic framework to help the industry better understand the important aspects of system-level languages," said Kevin Kranen, director of strategic market development.

CynApps will bring its CynLib C++ class library into alignment with the effort, said John Sanguinetti, the company's president and chief executive officer, and a participant in the SRM project. "Everyone felt it would be more successful to do a semantic reference manual rather than a language reference manual," Sanguinetti said. "Basically, you can define a standard way of doing things without having to lock everybody into one vendor's products."

LavaLogic, which offers a Java-to-Verilog translator, will also support the SRM effort and help with an implementation, said Don Davis, director of R&D.

Simon Davidmann, president and chief executive officer of Superlog creator Co-Design Automation, also voiced his support for the SRM approach. "I was very concerned that OVI would go one route, SLDL would go a different route, and the whole thing would split up into a Tower of Babel," he said. "The idea of moving toward defining semantics means we can bring this all together."

While the OVI ALC effort has a strong industry orientation, the SLDL system semantics working group has an academic bent. The group is chaired by Alberto Sangiovanni-Vincentelli and co-chaired by Ed Lee, both professors of electrical engineering and computer science at the University of California at Berkeley. The document they're developing is under the auspices of the Gigascale Silicon Research Center, part of the multi-university Marco project.

'Basic foundation'

"The goal is to come up with basic principles about system design and what the semantics of system design ought to be," said Sangiovanni-Vincentelli. "By no means whatsoever are we trying to define a standard language for system design. This is a basic foundation that different languages might map into."

The first task, said Lee, is to "define a very generic abstract syntax that we believe will map very well into component-based architectures and languages out there now, but that is complete, formal and simple, and is not dependent on a particular concrete syntax." That effort, he said, will encompass such questions as "how components know about one another, what interfaces the components expose, how you aggregate components to form new components." Issues such as data types will be treated separately.

The second step, said Lee, is to describe a family of semantic models that define possible interactions between components.

"We're hoping to have a description of the abstract syntax in some readable form within the next month," he said. "With the semantics, I'm not sure how much longer it will take to get it in readable form."

Sangiovanni-Vincentelli, who is also chief technology officer of Cadence, stressed that the SLDL activity is completely independent of Cadence and is being carried out under university sponsorship.