Jon Treanor has been brought in as chief executive officer and Ian Page, who led the research that created Handel-C at Oxford, has taken up a full-time position as senior technology consultant. Embedded Solutions Ltd. (ESL) will also close a round of funding worth about $8 million at the end of this year and is opening offices in Singapore and the United States.

Handel-C is a C-like high-level language that can be used to describe system functionality. The Handel-C compiler, currently ESL's main product, allows designs expressed in Handel-C to be compiled into an EDIF net-list. The EDIF description can be taken on, using place and route software, to create field-programmable gate arrays that perform the function in hardware. Given that hardware reconfiguration is a major research theme at the company, ESL favors the FPGA approach. Alternatively, however, the EDIF file can be used to drive the creation of an ASIC solution.

C-to-hardware

"Lots of people claim to have C-to-hardware. They don't. We do," said Treanor. "And reconfiguration will be a feature of every electronics product in 10 years' time." He said that with the industry homing in on hardware-software co-design and the use of C and C++ as modeling and design entry languages, ESL is now in position to benefit from its leading research position.

"The old ESL was quite successful at shipping Handel-C into universities and R&D groups but there was no real back-up or supporting infrastructure," he said. "We need to develop more of a partnership model to build confidence in the technology." ESL's three years of activity have resulted in about 200 active Handel-C licenses, mainly in universities but also at about 20 commercial companies.

"A service and partnership model will allow us to grow the technology base; it will allow us to put an infrastructure in place that could eventually support standalone tools."

Trainor said Embedded Solutions would also move toward developing configurable and compilable intellectual-property cores that could be licensed out using a business model similar to that of ARM Ltd. (Cambridge, England).

To further its service and partnership goals, ESL is pursuing European-funded research grants and is setting up a joint venture in Singapore with Kent Ridge Digital Laboratories, a nationally owned research group there.

A previous European collaborative research project called Aspire, carried out by Oxford's Computing Lab, ARM and Atmel Corp. (San Jose, Calif.) through its European subsidiary based in Rousset, France, is a source of reference data on the capabilities of Handel-C compilation.

Treanor said the now-completed Aspire project showed development time for a microprocessor peripheral could be cut from 10-14 weeks using a traditional Verilog design flow to two to three weeks with Handel-C. He said Handel-C produced a design 6 percent smaller in silicon area than the Verilog-based design.

The current Software Engineering for Hardware Design project between ESL, Ericsson, Infineon Technologies and Matra BAe Dynamics is intended to help these companies' R&D departments evaluate Handel-C and enhance the compiler, moving it from version 2.1 to 3.0.

Part of the philosophy behind Handel-C is about putting hardware design in the hands of software engineers. "There's a lack of hardware design skills out there, and it takes time to train designers in VHDL," said Treanor. "We're also seeing elongated VHDL design cycles when the pressure is on to reduce design times. So, give the power to the software engineers."

As a startup with just 33 workers, Treanor said ESL would focus on a few key applications that could benefit from Handel-C's speed and flexibility: Internet security, telecommunications and network infrastructure, graphics and palmtop computing.

The money raised in the current round of financing will be used to fund expansion and look for partnerships in these areas, he said.