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ESC: Synopsys leads C++ initiative to transform hardware design








EE Times


SAN JOSE, Calif. — Setting the stage for what could be a new era in electronics design, a coalition that claims roughly 35 EDA, intellectual property (IP), semiconductor and systems vendors will launch the Open SystemC initiative at this week's Embedded Systems Conference (ESC). Led by Synopsys Inc. and CoWare Inc., the initiative is offering an open-source C++ "modeling platform" that will allow hardware, software and systems design in C or C++.

Consisting of a C++ class library and a simulation kernel, the SystemC platform will initially benefit IP providers and systems designers who want a standard way to exchange high-level models. But it also sets the stage for the development of tools that will let some of today's HDL designers move up to C and C++. Such a move will be necessary, some observers say, as more system-on-chip functionality is expressed in embedded software.

The Open SystemC initiative already has competition: CynApps has placed its CynLib C++ class library under an open-source license. Cadence Design Systems and Mentor Graphics, the two largest EDA vendors other than Synopsys, have endorsed the CynApps approach.

The Open SystemC initiative may also conflict with the efforts of standards bodies, particularly the Open Verilog Initiative (OVI), that are working in the same area.

"We're putting into place the instantaneous de facto standard of how to use these [C++] formalisms for hardware," said Aart de Geus, chief executive officer of Synopsys. The initiative, he said, is a milestone that joins two worlds — semiconductor implementation and system design — that increasingly overlap in the system-on-chip era.

Despite the lack of large EDA vendor support, Open SystemC has an impressive list of backers. The initiative's steering group includes Synopsys, CoWare, ARM, Cygnus Solutions, Ericsson, Fujitsu, Infineon Technologies, Lucent Technologies, Sony, STMicroelectronics and Texas Instruments. Synopsys said other participants include Altera, Aptix, Denali, Ikos, Logic Vision, Tensilica and Xilinx.

A C++ class library lets C and C++ programmers express such hardware-oriented concepts as concurrency, parallelism, ports, wires and reactivity. Agreeing on a standard library will allow IP providers and system designers to use one dialect of C++, thus allowing interoperability, and will provide a common platform on which to build synthesis, hardware/software co-design and verification tools.

"The system-on-chip world is clearly headed toward having the predominant amount of system functionality expressed in software," said Brian Barrera, director of strategic marketing at Synopsys. Since systems and software architects already use C and C++, hardware architects will also need to work with them, he noted.

"In many of the companies we talk to, nine out of 10 people are software people," said Guido Arnout, president and chief executive officer of CoWare. "They have no clue what the hardware side is. Hardware people have to come on board and move to a C-based methodology."

Arnout said today's hardware designers will ultimately move from HDLs to C and C++, just as they gradually moved from gate-level to register-transfer-level (RTL) design. But de Geus took a more cautious position. "Most of today's hardware designers will continue to work in VHDL or Verilog," he said. "A small group will need to be bilingual."

Just as any evolution to C and C++ will be a gradual process, the modeling platform itself will take some time. What the initiative is revealing now is an initial draft release, available for download.

"We have a provision to get feedback from the community and have some rapid evolution before we aim for stability with a 1.0 release in the March 2000 time frame," said Pete Hardee, product marketing manager at CoWare.

The platform combines a C++ simulation environment developed at Synopsys, code-named Scenery, and CoWare's experience in "register-transfer C," a part of its N2C co-design package. The SystemC platform is available without charge under an Open Community Licensing program, which combines open-source licensing with Sun's Jini Community Source Licensing. Hardee said that the platform serves systems and software design as well and that it lets software developers model interrupts and messages.

Tools coming

Both Synopsys and CoWare intend to offer tools that work with the SystemC platform, but those are not expected until next year. Synopsys, the overwhelming market leader in logic synthesis, is widely expected to field a C and C++ synthesis environment.

CynApps is actually ahead of the initiative in some respects. The CynApps C++ class library is ready now, although it focuses more specifically on hardware design than SystemC does. And the company has just rolled out the first of its C++ design tools.

Some engineering managers are clearly warming to the C/C++ approach. "We think it would be a big win for us to use C or C++ as a high-level design language," said George Plouffe, engineering manager at Sun Microsystems Inc., which both CynApps and Synopsys list as a supporter. "We want to do our architectural design and our performance modeling in C or C++. We are hoping to take that model and iterate on it until we come to our synthesizable RTL."

"We need to spend more time in the early stages of the design phase and in hardware and software co-design," said Open SystemC supporter Jan Olof Kismalm, director of microelectronics at Ericsson. "A standard way of modeling should help."

Sharad Mehrotra, chief executive officer of networking startup Procket Networks, said his company is evaluating CynLib for hardware design. "In coming here, we were very concerned about the disconnect we saw between the architect's view, personified in a performance model, and what got built, which is a rewrite of the entire machine by a separate group of logic designers," he said.

Establishing a standard such as SystemC is essential if the system-level language market is to take off, said Gary Smith, chief EDA analyst at Dataquest Inc. (San Jose, Calif.). "HDLs won't be abandoned," he said, "but they will be embedded into the design flow and become tomorrow's gate-level language." Asked about the CynApps library, Smith replied, "Three of the top companies in this [co-design] field are Synopsys, CoWare and C Level. If C Level Design goes along with it, this is probably the one that's going to be a standard."

Though listed by Synopsys as a charter member of the initiative, C Level Design, which markets C language-based "algorithmic synthesis" tools, said it hasn't joined anything yet.

"Based on our understanding of the documents we've been given, they have provided an HDL design environment expressed in C++," said Martin Baynes, vice president of engineering at C Level Design. "Our approach is different. We are trying to support people who are using C and C++ in a top-down methodology."

Baynes said his company wants to see an approach that's standardized by OVI or the Virtual Socket Interface (VSI) alliance. He would like to see Synopsys submit the Open SystemC proposal to the OVI architectural-language subcommittee.

Nonetheless, Open SystemC has picked up some surprising endorsements. One is from CoDesign Automation, which has been promoting its Superlog language as a better approach for hardware and system design than such alternatives as C, C++ or Java.

"The SystemC vision is pretty simple," said Simon Davidmann, CoDesign's president and chief executive officer. "It's all about exchanging system-level IP in software. We believe that Superlog has all this wonderful stuff, but we recognize that not all hardware and software IP is going to be in Superlog."

Also, Simulation Magic, a startup that is developing a graphical language based on C and C++, is also backing the initiative. President and chief executive officer Shay Ben-Chorin said his company will offer code generation into a C++ class library — but he also argued that a graphical environment that allows rapid modeling is essential.

As a leading IP vendor, ARM Ltd. welcomes SystemC, said Tudor Brown, ARM's chief technology officer. "It simplifies our world," he said. "The bane of the modeling world has been the large number of languages and approaches that are available. It means we have to do multiple versions in support of our cores."

Brown added, however, that C language synthesis is "a tough problem and probably a step too far right now."

However long the list of endorsements, the Open SystemC initiative can't claim solid EDA industry backing without Mentor and Cadence. And representatives from both of those companies say they don't know enough about the initiative to make an endorsement.

"I think there are some issues to be worked out with this whole C++-to-HDL methodology," said Stan Krolikoski, senior architect for Cadence's system-level design group. "If you have a real C++ programmer, you'll probably end up with a nonsynthesizable design. If an RTL designer does it, you'll end up with something that looks like Verilog. Neither is going to get you much further ahead than where we are now."

Nevertheless, Cadence endorsed CynLib after reviewing the CynApps library and making sure it would fit into the Cadence design flow, said Mike Gianfagna, vice president of marketing for Cadence's design verification products.

And Serge Leef, director of engineering with Mentor Graphics' co-design business unit, said that CynLib works well with Mentor's Seamless hardware/software co-verification tool.

OVI is another party that is standing aside from Open SystemC. Synopsys is not submitting the proposal to the architectural-language subcommittee; in effect, it's competing with that committee's effort to select and standardize a high-level language approach, said OVI chairman Dennis Brophy.

"Competition in this case is going to increase the chaos and confusion that observers are going to witness," said Brophy. "The counterargument is that they can probably get something out sooner rather than later."

Synopsys is, however, heavily involved in the VSI system-level design working group, and the data types in SystemC closely match what the VSI group is developing, said Joachim Kunkel, vice president of system-level design at Synopsys.

As a small startup facing an EDA giant, CynApps would seemingly have the most to lose from the Open SystemC initiative. But CynApps president John Sanguinetti doesn't seem concerned.

"If they're legitimizing the market, the bastards say welcome," Sanguinetti said. "Our library is completely open, and I'm sure its evolution will include whatever good ideas SystemC has to contribute.

"The point is not so much whose class library is going to be the standard," Sanguinetti said. "The issue really is a fundamental change in the way designs are going to be done and how design tools are going to be presented to the market."

— Additional reporting by Michael Santarini and Peter Clarke











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