Andrew Peng, DRAM marketing manager at Hitachi Semiconductor (America) Inc., said the DDR capability will provide a peak data bandwidth of 2.1 Gbytes/second at a core frequency of 133 MHz, and a random access time of 30 ns. By reading data from both the rising and falling edges of a clock, DDR parts achieve a higher peak bandwidth than SDRAMs that run at the same clock frequency.

With sample prices in the range of $200/chip, the market for 256-Mbit DDR parts starts at the high end of the server market. Peng said some Hitachi customers load 100 Gbytes of main memory into a system, requiring as many as 400 dual-in-line memory modules (DIMMs) populated with 128-Mbit parts. Customers who switch to the 256-Mbit density can reduce the number of DIMMs by half, he said.

While several DRAM makers, including Hitachi, are in early commercial production with non-DDR 256-Mbit SDRAMs at the PC133 speed, Hitachi will push the DDR spec. Mass production of the 256-Mbit DDR will start in November.

"Our strategy is to come out with 256-Mbit DDR parts and then use that basic design to introduce a 128-Mbit DDR part later, using the same 0.18-micron process," Peng said.

The Joint Electron Devices Committee (Jedec) will approve a detailed standard, or reference specification, of what is called "DDR1" in September. Peng, who takes part in the Jedec standards activities, said Jedec will approve "a standard reference DDR specification — not a datasheet — for users," with standardized electrical characteristics, capacitance, ac timing diagrams, symbols, notes and both internal and I/O power specification.

As DRAM architectures have grown complex, Jedec has had to standardize more features and functions for its "approved" reference spec. The Jedec DDR DRAM databook will be completed by September.

Advanced Memory International Inc. (AMI2), a group formed out of the effort to develop a Synclink or SL-DRAM specification, has gone a step further. AMI2 members look at parts created by the various DRAM vendors and recommend more-detailed parameters. This ensures compatibility and performance optimization among the available DDR parts. The power-up and power-down sequences, dc parameters and other specs have been fine-tuned by AMI2, with the result being that "a customer can use the Hitachi and Samsung parts, for example, interchangeably," Peng said.

AMI2 members also are working to provide detailed specifications on the more commonly used modules. While many server customers develop customized, fault-tolerant modules to ensure error correction, the bulk of the server industry will use standardized, 184-pin modules.

While Jedec may approve several DDR modules, AMI2 is likely to endorse two modules.