For several years, the semiconductor industry has lived with the consensus that the next great shift is to the system-on-chip, that integrated blocks of predesigned intellectual property will be the hallmark of the next phase of electronics. But there is less agreement about how to get to that new land.

At a recent Arizona conference, technologists from half a dozen major semiconductor suppliers generally admitted that they lack the tool chains and reusable IP libraries to perform this new kind of design. One insightful manager told me he believes the journey will involve three to four more years of work and at least one breakthrough before the industry gets where it needs to be.

Senior managers at such titans as Motorola and NEC readily acknowledged that their companies embrace a diversity of incompatible design methods and that too much of the chip-level engineering done at their companies is not reusable from one project to the next. "Right now we have something on the order of 200 design teams around the world that use every methodology known to man," quipped one manager.

"The most key requirement for doing system-on-chip is the right design environment," said another.

But there is no leadership in intellectual property, EDA or system-on-chip design, said Jim Morris, chief executive of conference cohost Simutech LLC. Morris suggested the industry may need a crisis to catalyze the changes need to forge the new era.

Today there is little in the way of standards to manage system-on-chip projects, and tools are immature. The methods for melding logical and physical design are still very much in debate, the languages for describing the chips and blocks to be designed are by no means agreed upon, and the impact of the Internet on the whole process is nascent.

So as we leave behind the 36th DAC, it's clear we still stand before a gulf that must be crossed, and the water is wide.