AMD's strategy in the X86 CPU market has always involved price competition, and the company has historically suffered manufacturing problems early in the life of a new product. But AMD — which recently took the Draconian step of selling its temple-like corporate headquarters here to investors — may have problems that go much deeper, to the core question of its ability to execute its strategy.

The depth of the immediate problem was indicated by numbers in circulation this week. Analysts estimated the contract price for K6-2 CPUs for March delivery to be as low as $40 each for the 333-MHz chips, and no more than about $60 for the top-end 400-MHz parts. But MicroproDesign Resources, publisher of the industry icon Microprocessor Report, estimated that the full manufacturing cost of the chips, including test, packaging, depreciation and allocated engineering expenses, was in the neighborhood of $35 each.

"That cost model is fairly inclusive," said Linley Gwennap, Microprocessor Report publisher. "It does assume, however, relatively high fab utilization and yields typical of the industry. We believe the fab utilization at AMD's quarter-micron Fab 25 is in fact quite high. We think they have built out about 3,500 wafers per week of capacity in a fab with about 5,000-wafers-per-week potential. We assume they are pumping through all the wafers they can.

"What we don't know, in light of the continuing reports of yield problems, is what kinds of yields they are seeing," Gwennap continued. "If their actual yields on the K6-2 are below industry standards, their actual cost per chip would of course be higher."

Meanwhile, AMD denied allegations leveled in a pair of class-action lawsuits filed this week that asserted the company artificially inflated its stock price over the past few quarters with overly optimistic projections for revenue from the K6 processors.

"The lawsuit filed on behalf of a shareholder is totally without merit," said Thomas McCoy, senior vice president and general counsel at AMD, responding to the first suit. A few days later it was followed by another, both in U.S. District Court for the Northern District of California. McCoy said the company would fight the charges.

With contract prices near — or, in some cases, possibly below — manufacturing costs, AMD cannot be generating a lot of income from the K6 line. But for the struggling company, the K6 is the only game in town. In a recent financial statement AMD admitted that every other product line it had except for the CPU family was losing money.

So AMD must turn to its new flagship part, the K6-III, for short-term deliverance. But the news has been at least as bad on that front.

"Currently, we literally only have one sample K6-III in our R&D department," a manager at one Taiwanese manufacturer said angrily. "It makes it hard to develop new products when our engineers have to pass around and fight over a single sample CPU."

AMD admits to having a problem making the K6-III transition. "It's true that we can currently only deliver one or two samples to the Taiwanese mainboard makers," said Michael Lim, senior product marketing engineer for AMD Far East Ltd. "Part of that is that we are trying to deliver our current K6-III production to the U.S. OEMs. The other half of the situation is that the K6-2 is our major product until at least the third quarter."

AMD also admits that the initial ramp of the K6-III is not meeting projections. "We are having problems fabricating the K6-III," said Lim. "We are moving from a 9.1 million-transistor K6-2 to a 21.3 million-transistor K6-III. We are also tuning up the manufacturing for 450-MHz samples of the K6-III as well as switching over to 0.18-micron production." The bottom line, he said, is that "our ramp-up yields of the K6-III aren't where we wanted them to be."

Customers reported that not only are the parts nearly impossible to get, but making them run at speed requires 2.4 V rather than the rated 2.2 V, suggesting that timing problems may be hurting yields.

Dean McCarron, principal at research firm Mercury Research (Scottsdale, Ariz.), said it appears that as with previous members of the K6 line, the problems stem from critical speed-path issues common to multimillion-gate designs. "There's a greater separation between the design engineer and final layout in some of these designs," McCarron said.

An AMD spokeswoman in the United States also admitted to a shortage of K6-IIIs, and pointed to a timing problem. But the design flaw that had cut yields of the higher speed grades "has been fixed," she said.

"I won't tell you that we won't suffer from that in this quarter, because our results won't be as good as we had hoped. But we are shipping a richer mix of devices now, and our next quarter will be better," the spokeswoman said.

Continuing problems

This was not necessarily reassuring to long-term AMD watchers. "I have a saying that AMD has a long-term history of short-term problems," quipped Mike Feibus, also a principal at Mercury. "AMD had the same problems with their K6-2 and K6 when they both first came out," added an R&D engineer at First International Computer. "We've kind of gotten used to it. It's always this way with AMD."

Gwennap made a similar point. "It's impossible to say exactly what's going on inside AMD," he said. "But the impression one gets is that they get the recipe, find a problem, make a minor change to fix the problem and that loses the recipe for them again. It's not that they aren't fixing the problems — I believe them each time they say they have. But it seems like every quarter there's a new [problem]. I think this may be a question of the manageability of the process there, rather than a design flaw."

This view appeared to be confirmed by another source — who wished not to be named — who recently left AMD to join another company as a yield-enhancement manager. This engineer said the problem is with design resources, not process technology.

"AMD does have a good process. The problem is that they have a small design team, and only about 15 design engineers are available to do the design revisions needed to boost the yields at the higher process speeds," the source said.

Certainly the process and architectural problems with which AMD must cope are not simple. The company acquired the K-series architecture — and, in a sense, its process road map — when it purchased struggling CPU venture NexGen Microsystems. At that time it appeared the company's internal push to develop a clean-room X86 CPU had proved unsatisfactory. AMD reached out for NexGen and its extremely compact, fast X86 design.

But there were two fundamental facts about the NexGen design that would influence the entire future of AMD's CPU efforts, and in some degree create the problems the company now faces. First, fabless NexGen relied on a highly sophisticated five-metal CMOS process from IBM Microelectronics to get competitive speed and die size. And second, NexGen chose to use a non-Intel-compatible bus architecture to speed its chip.

The process issue was an immediate barrier for AMD, which at the time had a relatively typical three-metal process. Not only did the company have to accelerate the move to smaller geometries, but it had to add the extra metal layers and, more problematically, the local interconnect layer, provided by IBM.

The local interconnect continues to be a two-edged sword. On the one hand, this layer of poly or metal underneath metal-1 can substantially improve the size of some standard cells. For instance, Gwennap estimated that AMD's use of local interconnect in the K6-III's on-chip L2 cache makes its SRAM so small that the 0.25-micron K6-III die is likely to be smaller than the as yet unannounced Intel Pentium-III "Coppermine" die, which has the same amount of cache but in a 0.18-micron process.

But the local interconnect is also a major pain for process engineers. "Intel has told me that they evaluated local interconnect for their P856.5 process, and decided it wasn't worth the problems," Gwennap said.

The bus issue has also been a struggle for AMD. NexGen chose a proprietary bus that, unlike the Pentium bus, had a separate connection to L2 cache. This allowed the chip to exploit all of its inherent, high CPU bandwidth on tasks that didn't fit in the small L1 cache. But it made the chip incompatible with Pentium sockets.

Believing from the outset that NexGen's proprietary bus was a market mistake, AMD redesigned the NexGen chip to use the Pentium, or Socket-7, interface. But Intel chose not to share the rights to its next bus, the Slot-1 interface used on the Pentium-II. AMD opted to stay with increasingly faster versions of Socket-7 on its chips. This naturally put increasing pressure on the bandwidth of the old Pentium-style bus, since CPU references to L2 cache, main memory and I/O all had to crowd into the single bus.

AMD's solution in the K6-III was to move the L2 cache on-chip. This gives the device L2 cache bandwidth nearly five times that of the K6-2. But it also means a huge — 118 mm² — die. This reduces both the number of raw dice on a wafer and the yield, making it absolutely essential that AMD get a high price for the K6-III.

Analysts seem to agree that the technical problems with the K6-III will, in their turn, be solved. But unless AMD can quickly ramp up production while holding high average selling prices, it may literally starve for operating capital. And investors are increasingly impatient.

Calls have begun for the removal of AMD founder and chairman W.J. (Jerry) Sanders III, who has long been a lightning rod for criticism. Some see his vendetta-like pursuit of Intel in the X86 market as hubris that has torn apart his once-strong company.

Still, Sanders, who grew up hungry on the South Side of Chicago, isn't likely to leave. When executive-compensation watchdogs called in heavy artillery on him several years ago for effectively setting his own pay and bonuses, Sanders marched right through the fire. He controls the board tightly.

Now AMD is reportedly offering to add a ninth, independent member to the board to quiet criticism of Sanders' control. But insiders don't expect to see Sanders exit without a wholesale storming of his citadel.

"Jerry won't leave," said a longtime AMD observer. "Next year maybe he becomes less of a player, but he won't leave as a loser. It's not his style. He quits as a winner."

— Additional reporting by David Lammers and Ron Wilson.