MONTEREY, Calif. — The Future I/O initiative from Compaq, IBM and Hewlett-Packard got a shot in the arm last week as the group staged its first developer's meeting here for its I/O technology aimed at high-end servers. Designers from as many as 60 companies signed agreements to participate in the definition of the standard from a crowd of more than 220 engineers who attended the two-day meeting.
The group also provided some fresh details of its approach, which will compete with a separate initiative dubbed Next Generation I/O (NGI/O) backed by Intel. In its first generation, Future I/O will use a four-pin communications protocol to create bidirectional links with an aggregate peak bandwidth of 2 Gbytes per second, said Karl Walker, director of technology for Compaq Computer Corp.'s PC server group. The links will extend 10 meters over copper and 300 meters over fibre-optic media, he added.
The group is already at work articulating second and third generations of its approach that will provide aggregate bandwidth of 4 and 8 Gbytes/s, respectively, Walker added. A prototype connector for Future I/O has been developed by a major connector maker, he said.
Walker said Future I/O was defined to embrace connections between systems as well as between boards in a system and chips on a board. That design goal meant the group was willing to give up the long-distance connections offered by pure serial connections such as Fibre Channel in favor of four-wire links that moved more quickly to high bandwidths.
The Future I/O specification will be a work in progress for much of 1999, according to Walker. By early next year, the spec should be fully ratified by a steering group now being organized and products should follow in 2001.
In a related move, a working group charged with hammering out a technical specification for PCI-X, an extension of PCI that supports 132-MHz links, finished draft work on that spec at a meeting in San Diego last week. The group will spend the next 90 days cleaning up the language of its specification before submitting it to the PCI steering committee for formal approval, Walker said.
PCI-X was initially developed as an interim I/O technology by the same trio of PC server makers proposing Future I/O. While PCI-X extends the memory-mapped PCI bus architecture, Future I/O aims at creating a channel-based link not tied to processor interrupts.
"The synergy between these two proposals is no accident," Walker said.
For its part, Intel Corp. is expected to provide more details about its plans for NGI/O next week (2/23-2/24) at a developer's meeting in Palm Springs, Calif. The NGI/O spec has been out for comment to designers since late last year.
