UNION CITY, Calif. — Frontier Design and HP EEsof, the third and fourth largest suppliers of DSP silicon design software, will collaborate on the marketing of tools, models and design services for third-generation cellular phone systems. HP EEsof has leadership in RF and wireless systems design, while Frontier, a Mentor Graphics spinout, is strong in EDA and custom DSP and intellectual property [IP] development. The partnership, which is expected to generate $4.5 million in immediate new business, will be announced this week.
Under terms of the partnership, HP EEsof will provide system-level simulation software, the HP Advanced Design System (ADS-2), and its libraries of wireless system models (including W-CDMA, CDMA, and GSM). Frontier will harness ADS-2 to develop new DSP IPs and cores for HP customers. The immediate target is 3G systems using W-CDMA, CDMA2000 or GSM protocols. Frontier, in fact, hopes to introduce a new GSM core and a G.729 speech coder at the European Design Automation and Test (Date) conference in March.
HP EEsof's DSP marketing manager, Paul Washkewicz, said cellular system manufacturers favor the partnership. "They're strapped for engineering help," he said. They are missing tools or expertise needed to develop next-generation systems, and would look to the HP EEsof-Frontier combination to fill in their gaps, he said.
"Frontier has a big jump on us in the DSP area," said Washkewicz. "We look to them for design consulting services." HP EEsof already has produced shrink-wrapped models for Edge speech coders, and W-CDMA, CDMA2000, and IS-195 (A and B) wireless protocols, said Washkewicz. He is looking for Frontier's help in converting these models to IP cores.
Frontier will use its Melbourne, Fla., design center to develop 3G IPs targeted at multiple platforms, according to president Mike Cummiskey. The company's "algorithm-to-silicon" arsenal includes the "algorithm-to-RT" C-to-HDL conversion library, and its Mistral design compiler. The 3G IP cores that Frontier develops could be directed at ASICs, FPGAs and existing DSP cores, Cummiskey said. "The ASIC and FPGA methodology is the same," he said. "Only the synthesis tools are different."
Tools such as those of Go DSP (Toronto), Cummiskey said, would help convert C models to code for Texas Instruments' C54X or C6X cores. Thus, TI DSPs could be used as test beds or prototypes for new DSP algorithms.
Market shares
Cummiskey would not comment on the possibility of a business merger between HP EEsof and Frontier Design. "There could be additional areas for collaboration," he said, "but let's let the first project [3G IPs] play itself out."
Both HP EEsof's Washkewicz and Frontier's Cummiskey described their market position as "number 2." That might be a stretch, according to DSP market analyst Will Strauss of Forward Concepts (Tempe, Ariz.). "It depends on how you count. I've got to be shown they're number two." Strauss' study of the $45 million 1997 market for DSP silicon EDA tools ranked Cadence's Alta Group first with a 48.9 percent market share, and Synopsys second with a 28.9 percent share. Frontier Design was third with 6.7 percent. HP EEsof's slice of this market (excluding its RF tools) was 4.4 percent. HP EEsof is very strong in wireless, Strauss noted. "Frontier is being aggressive in custom design services."
Frontier's Cummiskey projected that the demand for new communication services will create "explosive growth" for 3G IPs and cores. The HP EEsof-Frontier combination, he said, will resolve some of the "turmoil" cellular system builders may be experiencing about the availability of design tools and services.
Already, the combination has opened $4.5 million in new business for the two companies. One opportunity is a GSM design with a near-term value of $1.5 million, Cummiskey said. There also two "transactions" in the CDMA area, worth about $2 million each.
