The Ocapi tool suite allows users to progress from C or C + descriptions of behavior and refine them to structural descriptions at the register-transfer level. The software then supports automatic translation of C/C + to VHDL for conventional synthesis, a step that is not usually automated and therefore often a source of error in other design flows.

When the software is used with its full object-oriented capabilities, said Serge Vernalde, group leader in DSP systems at IMEC, it provides compact code and short design times. IMEC, based here, has used Ocapi to develop a number of chips recently, he said, including a graphics coprocessor, an upstream cable-modem receive channel and a Digital Enhanced Cordless Telephone (DECT) modem.

The 75,000-gate DECT modem, which uses a very long instruction word architecture, was taken from algorithmic description to the gate-level in 18 person weeks of design time, Vernalde said.

He said CoWare was "mainly interested in the part [of Ocapi] from C to VHDL. They are not taking in the full object-oriented design."

Vernalde added, "We could make the deal this year. I would expect Ocapi could be on the market within a year."

Language generator

Ocapi supports the generation of a VHDL hardware description from C after a partition between hardware and software has been chosen. It also focuses on data-flow design. "The refinement from behavior to structure is assisted, but once you get down to register-level C + the translation is automatic," said Marc Engels, department director in charge of telecom applications at IMEC. "The use is restrained by certain semantics that are embedded within the use of certain classes within C +. That means there's no parsing. We can describe all our design levels with the same language; multilevel simulation is key to robust verification."

Vernalde said IMEC will continue to develop Ocapi to extend it prior to the hardware-software partitioning. "We are working further on hardware-software codesign and we are looking at discrete-event modeling."